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Authors: J. Verbist, J. Zhang, B. Moeneclaey, W. Soenen, J. Van Weerdenburg, R. Van Uden, C. Okonkwo, X. Yin, G. Roelkens, J. Bauwelinck
Title: A 40 GBaud Integrated Silicon Coherent Receiver
Format: International Conference Presentation
Publication date: 5/2016
Journal/Conference/Book: European Conference on Integrated Optics (ECIO)
Volume(Issue): p.ECIO/o-22
Location: Warsaw, Poland
Citations: Look up on Google Scholar
Download: Download this Publication (303KB) (303KB)


We present an ultra-compact and low-power silicon coherent receiver operating at 40 GBaud QPSK (80 Gb/s) and 16-QAM (160 Gb/s). The receiver consumes only 310 mW of power and realizes a factor 4 size reduction of the photonic integrated circuit compared to previously reported single-polarization silicon coherent receivers. This is the highest reported symbol rate for a silicon coherent receiver.

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