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Authors: W. Bogaerts, U. Khan, Y. Xing
Title: Layout-Aware Yield Prediction of Photonic Circuits
Format: International Conference Proceedings
Publication date: 8/2018
Journal/Conference/Book: IEEE International Conference on Group IV Photonics
Editor/Publisher: IEEE, 
Volume(Issue): p.p93-93 (WD5)
Location: Cancun, Mexico
DOI: 10.1109/GROUP4.2018.8478734
Citations: 4 ( - last update: 16/6/2024)
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We demonstrate yield prediction of silicon wavelength filter circuits using layout-aware Monte-Carlo circuit simulations. Maps of wafer and die-level variability of width and thickness are projected onto circuit layout and translated into changes of circuit model parameters. We apply this onto Mach-Zehnder lattice filters to study yield for different filter orders.

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