| Authors: | G. Jo, P. Edinger, S. Bleiker, X. Wang, A.Y.Takabayashi, H. Sattari, N. Quack, M. Jezzini, P. Verheyen, G. Stemme, W. Bogaerts, K.B. Gylfason, F. Niklaus | | Title: | Wafer-level vacuum sealing for packaging of silicon photonic MEMS | | Format: | International Conference Proceedings | | Publication date: | 3/2021 | | Journal/Conference/Book: | SPIE Photonics West OPTO
| | Volume(Issue): | 11691 p.116910E | | DOI: | 10.1117/12.2582975 | | Citations: | 7 (Dimensions.ai - last update: 4/6/2023)
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Abstract
We demonstrate the first wafer-level hermetic vacuum packaging of Si photonic MEMS with optical and electrical feedthroughs. Si photonic MEMS is emerging as a unique technology for large-scale reconfigurable photonics. Hermetic vacuum packaging is critical to the performance and longevity, and to protect from contamination. However, there are no existing wafer-level packaging methods that
provide hermetic vacuum packaging with optical and electrical feedthroughs for Si photonic MEMS. The packaging method consists of sealing the photonic devices with 25 µm-thin Si caps. We illustrate the effectiveness of our solution by packaging wafers produced in the iSiPP50G Si photonics platform of IMEC. Related Research Topics
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