Deposited SOI technology for photonic application

Research Area: Optical signal processing

Main Researcher: Shankar Kumar Selvaraja

With ever increasing complexity and density of photonic integrated circuits the need for multilayer functionality is arising for next generation photonic circuitry. Even though mono-crystalline silicon-on-insulator exhibits superior optical quality it is difficult to realize multilayer circuitry based on this material. Deposited Si is a very good candidate for such application, however. The deposited material can be amorphous or polycrystalline depending on the deposition technique and parameters. The two popular deposition processes used in CMOS fabrication process are low-pressure chemical vapor deposition (LPCVD) and Plasma enhanced chemical vapor deposition (PECVD).
We have explored deposited silicon using LPCVD and PECVD techniques in 200mm CMOS deposition tools. LPCVD is used for polycrystalline and PECVD is used amorphous silicon deposition. During amorphous Si deposition the temperature is kept at 300C, which enables us to deposit on variety of substrates (above CMOS, polymers, etc…).

Left- TEM cross-section of polycrystalline Si, Right- XRD on amorphous Si

From our optical characterization, we measure a propagation loss of 3.45dB/cm for a photonic wire of 480nm wide and 220nm thick. We estimate the bulk absorption in amorphous Si to be ~0.7dB/cm

Using our low-loss amorphous silicon we have fabricated two layers of photonic circuit on top of eachother, some times refered as 3D photonic circuit. The two photonic layers were optically coupled through shallow etch gratings as Optical Via's (see figure below). This clearly demonstrates the feasibility of amorphous Si for multilayer photonic circuitry.

Optical via in Si using shallow etched gratings

Photonic wires (500nmX220nm) fabricated in polycrystalline Si (using LPCVD) measured a propagation loss of 13.4 dB/cm. Though this propagation loss is higher than amorphous silicon, we have identified certain area of application.
Using polycrystalline silicon we have made planar bragg stack on a 200mm silicon wafer, this can be used as high quality cavities.

Left- SEM cross-section of a fabricated DBR using poly-Si/SiO2, Right- Measured reflection of a bragg mirror (courtesy prof. S. Unlu, Boston Uni)

PhD thesises